About me
I am a fifth-year PhD student at the State Key Laboratory of Integrated Chips and Systems, Fudan University, supervised by Prof. Lingli Wang and Prof. Wai-shing Luk. I received my B.S. degree in Electronic Information Science and Technology from Nanjing University of Aeronautics and Astronautics (NUAA) in 2021, supervised by Prof. Xin Chen. I have published papers as the first author in several top-tier journals and conferences. In addition, I served as a core contributor or technical lead on several industry–academia collaborative projects with leading companies such as Huawei.
Most of my work is open source, and the repositories are available at link. I enjoy collaborating with others and am committed to making reconfigurable architectures more flexible and widely applicable.
My research interests mainly include:
- Reconfigurable Architecture: Hardware: Coarse-grained reconfigurable architectures (CGRA), Field Programmable Gate Array (FPGA)
- Reconfigurable Architecture: Software: CGRA Compiler (e.g., LLVM-based Front-end, CGRA Mapping), FPGA CAD (e.g., Synthesis flow for DSP block)
- Approximate Computing: Transcendental Function Approximation and Hardware Implementation
- System on Chip Design: CPU-Accelerator Heterogeneous System
I am currently (2025-2026) on the job market and open to research and industrial positions in computer architecture and accelerator design. If my background matches your needs, please feel free to contact me directly.
Selected Publications
[ISCA] LoRA: Towards Improved Applicability of Reconfigurable Architecture for Versatile Nonlinear Functions. Yuan Dai, Guibin Zou, Yuanda Yang, Huan Lin, Jianghang Lou, Yiwen Luo, Xinyu Cai, Wenbo Yin, Wai-Shing Luk, Lingli Wang. Annual International Symposium on Computer Architecture, 2026.
[TC] COFFA: A Co-Design Framework for Fused-Grained Reconfigurable Architecture Towards Efficient Irregular Loop Handling. Yuan Dai, Xuchen Gao, Yunhui Qiu, Jingyuan Li, Yuhang Cao, Yiqing Mao, Sichao Chen, Wenbo Yin, Wai-Shing Luk, Lingli Wang. IEEE Transactions on Computers, 2025.
[TCAD] Dependency-Aware Data Parallelism on Spatial CGRA via Constraint Satisfaction and Graph Coloring. Yuan Dai, Xuchen Gao, Huan Lin, Wenbo Yin, Wai-Shing Luk, Lingli Wang. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025.
[TVLSI] HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization. Yuan Dai, Jingyuan Li, Qilong Zhu, Yunhui Qiu, Yihan Hu, Wenbo Yin, Lingli Wang. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024.
[ASP-DAC] Towards Efficient Data Parallelism on Spatial CGRA via Constraint Satisfaction and Graph Coloring. Yuan Dai, Xuchen Gao, Chen Shen, Bingbing Peng, Wenbo Yin, Wai-Shing Luk, Lingli Wang. Asia and South Pacific Design Automation Conference (ASP-DAC), 2025.
[FPT] APIR-DSP: An Approximate PIR-DSP Architecture for Error-Tolerant Applications. Yuan Dai*, Simin Liu*, Yao Lu*, Hao Zhou, Seyed Ramin Rasoulinezhad, Philip H. W. Leong, Lingli Wang. International Conference on Field-Programmable Technology (ICFPT), 2021.
[FCCM] UPTRA: An Ultra-Parameterized Temporal CGRA Modeling and Optimization. Yuan Dai, Yunhui Qiu, Qilong Zhu, Jingyuan Li, Wenbo Yin, Lingli Wang. IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2023.
Talk
[FPT 2025] Fusion SoC Workshop: Served as the initiator and lead organizer, responsible for organizing the Fusion SoC Workshop at FPT’25. This link leads to the workshop website, which provides access to our cloud-hosted end-to-end CGRA workflow, including front-end compilation, back-end mapping, and SoC simulation.
Academic Service
Reviewer: Integration; IEEE SSCL; IEEE TCAD; ACM TRETS
Secondary Reviewer: JSA; CGRA4HPCA; FPL
Awards
Huawei “Fenjin” Scholarship, China (Only 95 recipients nationwide each year).
The First Prize Scholarship, Fudan University.
National Scholarship, China.
“PuXin” Elite Scholarship, Jiangsu Provincial Department of Education.
Contact
Email: daiy21@m.fudan.edu.cn